Developing new methods to accelerate chip simulations
Stijn Ringeling defended his PhD thesis at the Department of Electrical Engineering on 24 June.
Integrated circuits, commonly known as chips, are at the heart of modern technology, powering everything from smartphones and computers to automotive radar systems and medical devices. Many of these devices rely on custom integrated circuit designs unique to their application. To make the fabrication of these custom-chips less expensive and time-consuming, engineers rely on computer programs to test their chip design before they鈥檙e manufactured. For example, computer simulations are used to verify whether a chip functions as intended. Yet, as chip designs get more advanced, these simulations can take weeks to complete. In his PhD research, Stijn Ringeling explores how chip simulations can be accelerated to overcome this limitation.
Stijn Ringeling analyses multiple methods to shorten the time that is needed to verify a chip design through simulations. His research ranges from classical modelling techniques to modern machine learning methods. The primary application of the research is to shorten the design process of Sigma-Delta modulators. Sigma-Delta modulators are a type of analog-to-digital converter (ADCs). ADCs are used to convert analog signals, such as sound or radio signals, into digital signals that can be processed by computers.
Enabling faster design cycles
With the results from his research, it鈥檚 possible to accelerate chip simulations by a factor of between 10 and 3000 times depending on the application. This means that simulation time reduces from weeks to just days. This enables faster design cycles and more efficient development of advanced integrated circuits. Ultimately, these improvements could support the creation of more powerful, energy-efficient technologies, shaping the next generation of electronic systems.
Title of PhD thesis: Supervisors: Prof. Eugenio Cantatore and Prof. Lucien Breems.